Over the last two decades, the memory system of a typical SoC has developed significantly, with caches now a staple of any modern system. Given their prevalance and conceptual simplicity, it is easy to assume that the management of caches is a well-understood, solved problem.
As caches evolve, software is falling behind hardware, assuming properties that no longer hold true. Issues are solved with reasoning based on anecdotal evidence rather than specifications, leaving software unreliable and difficult to maintain.
Focussing on the ARM architecture, this presentation will cover the significant ways caches and related components have evolved over the last decade or so, problems this results in, and how to manage caches so as to avoid such issues. By considering the cache model of the ARM architecture, attendees can gain an understanding that should apply to current and future SoCs.
