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YV

Yves Vandervennet

Intel
Engineering Manager
Texas, USA
Yves Vandervennet is an engineering Manager at Altera Corporation. He holds an MS degree in Telecommunication Engineering from the University of Brussels. Prior to working for Altera Corporation, he held various engineering positions (Freescale Semiconductors, Motorola, Philips Semiconductors).
Monday, April 4
 

7:30am PDT

Registration Promenade Foyer

8:45am PDT

8:55am PDT

9:25am PDT

9:45am PDT

10:40am PDT

11:40am PDT

2:00pm PDT

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4:10pm PDT

5:10pm PDT

6:10pm PDT

 
Tuesday, April 5
 

9:00am PDT

11:50am PDT

2:00pm PDT

3:00pm PDT

4:20pm PDT

 
Wednesday, April 6
 

9:00am PDT

11:05am PDT

1:35pm PDT

2:35pm PDT

3:55pm PDT